Graduate Silicon Engineer

Bristol, UKCompetitive0 applicants

About this role

About Graphcore

At Graphcore, we’re building the future of AI compute.

Requirements

  • On track or achieved a 2:1 or above in Electronic Engineering, Computer Science or related subject area
  • Able to evidence your technical skills in C/C++ or Python (2 or 3), for example through hobbies, projects or previous work experience. We are also keen to understand your technical skill level.
  • A highly motivated, curious, self-starter, willing to take action, as proven through extra-curricular activities or hobbies beyond your studies
  • Strong team-working and excellent interpersonal skills
  • Passionate with a keen interest to learn about the exciting new field of AI
  • We are not looking for an instant expert but graduates with the hunger to learn, develop and contribute to Graphcore's future.

About Graphcore

At Graphcore, we’re building the future of AI compute. We’re a team of semiconductor, software and AI experts, with deep experience in creating the complete AI compute stack - from silicon and software to infrastructure at datacenter scale. As part of the SoftBank Group, backed by significant long-term investment, we are delivering key technology into the fast-growing SoftBank AI ecosystem. To meet the vast and exciting AI opportunity, Graphcore is expanding its teams around the world. We are bringing together the brightest minds to solve the toughest problems, in a place where everyone has the opportunity to make an impact on the company, our products and the future of artificial intelligence. About the role The Silicon team are responsible for designing the silicon chips produced by Graphcore in leading node technologies and using the leading EDA Tools. Silicon is divided into three areas, that all work closely together: The Logical design and DFT team; responsible for realising architectural intent in a form that can be physically implemented and subsequently manufacturing level tested. In this team you’ll be iterating with Architectural, Verification, Physical & Operations teams to define the microarchitecture and produce testable RTL as above. The Verification team; ensure that our chips perform in accordance with their specification and that their implementation is similarly accurate. You’ll learn modern CPU and ASIC verification methodologies such as constrained random test generation and functional coverage and use those skills to verify our chips meet their specification. The Physical Design team; take the logical RTL and produce final transistor level layout (GDS) ready to send to a foundry for manufacture. You will gain experience with modern physical implementation steps including, but not limited to, synthesis, place and route, timing analysis, physical design checks, power integrity, logical equivalence. Our designs are in leading edge technology nodes which bring a lot of interesting challenges to solve, a very good environment to learn the latest silicon design techniques. All 3 roles involve using industry standard EDA tools which you will become familiar with. We are looking for technical, passionate, and motivated individuals with a desire to learn, work and develop in a technically challenging, fast paced environment.

EU Requirements

Job Details

Posted26 March 2026
Closes25 April 2026

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