Digital Verification Intern
About this role
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.
Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Title:
Digital Verification Intern
Responsibilities
- Support digital verification activities across different stages of the SoC development process.
- Learn how to translate design specifications into verification solutions.
- Contribute to verification environments under the guidance of experienced engineers.
- Develop your technical skills through practical, real‑world projects.
- What we are looking for (essential)
- Currently studying towards, or recently completed, a BSc in Electronic Engineering, Micro‑Electronic Engineering, Computer Science, or a related field (including final‑year students).
- Basic understanding of digital electronics.
- Familiarity with Hardware Description Languages (HDL).
- Basic knowledge of object‑oriented programming (OOP) concepts.
- Ability to work in English (written and spoken).
- Nice to have (but not required)
- Exposure to
- digital design
- concepts
- Awareness of verification methodologies such as
- OVM or UVM
- ,
- SystemVerilog Assertions (SVA)
- , or
- formal verification
- Experience with
- Python, Tcl/Tk
- , or other scripting languages
- If you do not meet all the “nice to have” criteria, we still encourage you to apply.