Research Intern, Compiler Instrumentation with hardware assistance for Morphing
About this role
Helsinki System Security Lab (HSSL) Internship
Compiler Instrumentation with hardware assistance for Morphing
Dynamic code randomization and code morphing (churned randomization, encryption in memory) are effective mechanisms to thwart memory attacks in the AI era, where machine learning has proven to be very effective to find shortcomings (bugs) in deployed software, and 50-70% of all bugs in C/C++ code are still today memory safety issues.
In this work we will use new hardware architecture (instructions) to prototype solutions that by a combination of code randomization and encryption makes it harder for an attacker to pinpoint the location where to apply an exploit in deployed code in the field. Primarily this project relates to compiler instrumentation to leverage existing architecture and instructions in in-house hardware. The work may also encompass augmenting hardware emulators (such as QEMU) for testing the compiler instrumentation results with standard benchmarking tests.
If selected, the intern will be working with experienced security experts in the Helsinki System Security Laboratory, and plan, design and implement the work under their guidance. This work is conducted as a internship where the results are not necessarily public-facing (closed IP), i.e., without further negotiation the results of this research may be chosen to remain proprietary, and therefore is not immediately suitable e.g. as a M.Sc. topic or part of a PhD studies.
We are looking for: A student who has completed most of their M.Sc. courses, in the field of CS/E.Eng, or a recent M.Sc graduate / PhD student
Compiler familiarity, e.g. through coursework or prior exposure to LLVM / GCC modifications
An understanding of low-level (system / OS) architecture, and hardware emulators is considered a plus
Sufficient skills to work and interact in English
Good team-working skills
The following we count as advantage: Background (courses) in compiler technology, hardware architecture