Job Details:
Job Description:
The Intel NPU IP team is looking for a Digital Verification Engineer to work on the validation of NPU AI accelerator products. In this role you will join the NPU Hardware Pre-Silicon Validation team working closely with verification engineers, design engineers and AI architects to validate components of the NPU IP portfolio. In particular we are interested in hiring engineers with experience in formal verification methodologies and assertion-based verification using System Verilog Assertions (SVA)
Your responsibilities will include:
Functional and/or Formal Verification of complex digital design block(s) on the latest generations of Intel's NPU AI accelerators.
Development and implementation of verification environments from initial planning through the validation lifecycle to review and signoff.
Development of test plans and test cases
Implementation of random test generators, high level transactional models, bus functional models (BFMs), functional/formal constraints, checkers and scoreboards, coverpoints/covergroups and SVA properties
Leixlip is the primary location for this position, however, we offer some flexibility to support your work/life balance arrangements.
The team is looking for digital verification engineers across a range of experience levels who have pre-silicon verification skills, although experience in adjacent engineering disciplines such as software development would also be considered.